June 17, 2021

Best demo paper award

The international symposium on VLSI Technology and Circuits has awarded CSEM’s Petar Jokic and his co-authors a Best Demo Paper award for their work entitled “A Sub-mW Dual-Engine ML Inference System-on-Chip for Complete End-to-End Face-Analysis at the Edge.” The award was presented (virtually) on June 17, 2021, in Kyoto, Japan.

The VLSI Symposia is an international conference on semiconductor technology and circuits that covers everything from process technology to systems-on-chip. Its 2021 edition was held virtually on June 13-19, combining workshops, talks, technical sessions, and live demonstrations.

Petar Jokic's co-authors are: Erfan Azarkhish, CSEM, Regis Cattenoz, CSEM, Luca Benini, ETH Zurich, and Stephane Emery, CSEM.

Results in brief

Smart vision-based IoT applications operate on a sub-mW power budget while requiring power-hungry always-on image processing capabilities. The awarded paper presents a system-on-chip (SoC) that enables hierarchical processing of face analysis under multiple sub-mW operating scenarios using two tightly coupled machine learning (ML) accelerators. A dynamically scalable binary decision tree (BDT) engine for face detection (FD) allows the triggering of a multi-precision convolutional neural network (CNN) engine for subsequent face recognition (FR). The 22nm SoC can therefore dynamically trade-off image analysis depth, frames-per-second (FPS), accuracy, and power consumption. It implements complete end-to-end edge processing, enabling always-on FD and FR within the tight 1mW power budget of a 55mm diameter indoor solar panel.

More information about the the VLSI Symposiawww.vlsisymposium.org