ASICs for the edge
Bringing data closer
Precise, intelligent, ultra-low-power sensors and actuators are the driving force behind edge processing

Our uniquely designed systems-on-chips with sensor interfaces, communication, and hardware will power your edge computing needs, providing real-time, low-latency and privacy-preserved insights into your data. Ultra-low-power (ULP) ASIC, SOC design services and silicon IPs are combined with sensor interfaces, imagers, ADC, MCU, and ML-derived hardware accelerators, wireless communication, ranging or localization circuits that can be co-integrated with power management and energy harvesting units.
This delivers always-on, battery-less, energy-autonomous, unobtrusive smart-sensing systems. Our USP is our ULP: custom hardware and ASICs, which achieve a 10x reduction in power consumption courtesy of architectural innovation.
Our work
Our solutions will transform your edge processing capabilities. Here are some examples:
- Precise, low-noise analog front ends: minimizing data acquisition power consumption via the design of low noise front ends and ADCs bridging the physical environment analog quantities with the digital environment
- Machine-learning derived accelerators: enabling a thousand-fold reduction in the power required to accomplish a specialized task compared to running it on a general-purpose MCU
- Accelerators with in-memory computing: generic enough to permit reuse for different applications and tasks owing to re-programmability and simple customization
- ULP processor cores: power-optimized microcontrollers, such as Icyflex-V, a power-optimized RISC-V core, combined with u111 OS, our proprietary operating system, are achieving novel breakthroughs in 22 nm advanced nodes and beyond.
- Low-power radio: best-in-class ULP BLE and dual-mode Bluetooth transceivers for the latest wearable and portable audio devices; LRP and HRP UWB impulse-radio used for secure ranging and access control; a 60 GHz ULP radar platform targeting battery-powered applications, such as contactless vital sign measurements
- CMOS imagers: customized image sensors where exceptional performance is required, such as sub-mW, high-dynamic image sensors for autonomous cameras and high-speed imagers for process control
- System-on-chip integration: state-of-the-art design flow, small-scale fabless production and the latest CAD environment enable extremely complex system-on-chip without sacrificing performance
- ULP design: a sub-threshold design and body-biasing to eliminate every microwatt

Want to get involved?
Whether you want to increase battery life, enable miniaturization, or add on-chip intelligence, optimized for cost and performance, CSEM can deliver the technology building blocks you need to make edge computing a reality.
Get in touch to find out how you can get explore ASICS for the edge today.